Outdoor autonomous systems require more than just accurate positioning, especially in mission-critical environments. In UAVs, defense applications and remote infrastructure systems, GNSS must continue operating under interference, degraded signals and dynamic conditions, while providing high data confidence.

The Septentrio mosaic-X5 GNSS M.2 receiver module is designed for this class of problem. It combines multi-frequency GNSS tracking with interference mitigation, signal authentication and integrity monitoring. When integrated with Gateworks industrial single board computers, it enables a modular architecture for high-integrity positioning at the edge.

GNSS Performance Beyond Accuracy

The mosaic-X5 is a multi-band, multi-constellation receiver tracking GPS, Galileo, GLONASS, BeiDou and NavIC across multiple frequency bands. Multi-frequency operation improves positioning robustness and reduces susceptibility to ionospheric errors and signal degradation. It supports RTK positioning and update rates up to 100 Hz, allowing it to maintain low-latency tracking for dynamic systems such as UAVs and mobile platforms. These characteristics are essential for maintaining control fidelity in real-world environments.

Assured Positioning, Navigation and Timing (PNT): Anti-Jamming, Anti-Spoofing and Integrity

For defense and mission-critical systems, the key question is not just “how accurate is the position?” but “can the system trust it?”

The mosaic-X5 integrates Septentrio’s AIM+ (Advanced Interference Mitigation) technology, which actively detects and suppresses interference across both narrowband and wideband signals. This includes resilience against pulsed and complex jamming scenarios.
It also incorporates:

• Anti-spoofing and signal validation to detect anomalous GNSS behavior
• RAIM+ (Receiver Autonomous Integrity Monitoring) to assess positioning reliability
• APME+ (Advanced Multipath Mitigation) to reduce reflected signal errors
• LOCK+ for robustness under shock and vibration
• OSNMA (Open Service Navigation Message Authentication) supports signal authentication

These capabilities position the mosaic-X5 within the broader concept of assured PNT, maintaining reliable and trustworthy positioning in contested environments.

RTK Correction Services and Scalable Deployment

High-precision positioning depends on correction data. The mosaic-X5 supports standard methods such as NTRIP as well as satellite-delivered corrections.

Services like u-blox PointPerfect GNSS correction service provide PPP-RTK corrections over IP or L-band, enabling centimeter-level positioning without requiring local base stations. This model simplifies deployment for distributed systems and mobile fleets.
For example:

• Cellular-connected systems can stream corrections via NTRIP
• Remote systems can use satellite-delivered corrections
• Private networks can deploy local base stations

This flexibility allows system designers to align correction strategies with operational constraints.

UAV and Defense System Relevance

Unmanned and defense systems operate in environments where GNSS degradation is expected, not exceptional. Positioning systems must maintain accuracy, continuity and integrity under these conditions. The GW16160 Mosaic x5 M.2 is industrial grade and engineered to perform in -40°C to +85°C temperatures and extreme environments.
The mosaic-X5 supports:

• Autonomous navigation and waypoint execution
• Geofencing and mission planning
• Mapping, inspection and situational awareness

It is also included in the Blue UAS Framework, a program led by the U.S. Department of Defense to identify trusted components for unmanned systems. This reflects both technical capability and supply chain trust, two critical requirements for defense deployments.

Practical Integration: GW16160 and Gateworks Platforms

The GW16160 is for use in autonomous systems, robotics, drones and outdoor asset tracking, where reliable GNSS is a foundational capability.

Gateworks platforms provide the compute and connectivity layer:

• Venice (i.MX 8M Mini & i.MX 8M Plus)
• VeniceFLEX (i.MX 8M Plus)
• Catalina (i.MX95)

The NXP i.MX95 application processor enables AI-accelerated processing, advanced security and real-time system integration, supporting GNSS as one component within a broader autonomy stack.

Security, Traceability and Manufacturing Considerations

For defense and infrastructure deployments, hardware selection includes more than performance; it includes traceability, security and lifecycle control.

We design and manufacture all of our products in the United States, with a vertically integrated production process that emphasizes:

• Full component traceability
• Controlled manufacturing workflows
• Long lifecycle availability

Gateworks products are assembled, tested and tracked within a single facility, with serialized components and real-time process visibility. These factors support deployments where supply chain transparency and long-term support are required. https://www.gateworks.com/company/manufacturing/

System-Level Architecture

In practice, GNSS is one part of a larger system:

• GNSS receiver (mosaic-X5)
• Correction service (e.g., u-blox PointPerfect GNSS correction service, NTRIP, etc.)
• Embedded compute (Gateworks Venice, VeniceFLEX, Catalina)
• Connectivity (cellular, Wi-Fi HaLow, Wi-Fi)

This modular architecture allows systems to scale across deployment environments while maintaining positioning performance and system flexibility.

Conclusion

For mission-critical outdoor systems, GNSS must deliver more than accuracy; it must deliver resilience, integrity and trust.

The mosaic-X5 addresses these requirements through multi-frequency tracking, interference mitigation, anti-spoofing and integrity monitoring. Gateworks single board computers combined with the GW16160 module allow for a practical path to deploying high-integrity positioning within embedded edge systems.

This approach aligns with the needs of modern autonomous and defense systems, where positioning is not just an input but a trusted foundation for decision-making.

Qualcomm’s engineering journey to evolve RF exposure management for modern wireless performance

The core mission of electronic warfare (EW) hasn’t changed: control the all communications so your forces can operate, and your adversary cannot. What has changed is everything around it. Today’s EW systems operate across airborne, naval and ground platforms that are increasingly built around multifunction RF architectures, where radar, sensing and electronic support capabilities are integrated into a single system.

In addition, performance expectations continue to rise. As threats appear without warning and signals shift instantly, response time is no longer measured in seconds, but in microseconds. Systems must continuously sense, interpret and respond across the entire RF spectrum.

EW environments now require wide instantaneous bandwidth, high output power and stable operation under extreme conditions. Publicly acknowledged frequency ranges such as 6–18 GHz and 32–38 GHz highlight the breadth of spectrum these systems must cover, often extending even further in practice.

Wideband RF Design Challenges in EW Systems

Wideband EW design comes with distinct design challenges because of the need to make one RF chain behave well everywhere, all at once, across frequency, power levels and operating conditions.

EW receivers are designed to achieve high spurious-free dynamic range (SFDR), typically in the 90–110 dB range, enabling detection of weak signals in the presence of strong interferers. For example, a 6–18 GHz receiver with 500 MHz bandwidth and a ~5 dB noise figure yields a noise floor near −82 dBm, with minimum detectable signals around −72 dBm when accounting for detection margin. To meet these requirements, wideband low-noise amplifiers must maintain 2–3 dB Noise Figures with minimal Gain variation, while also delivering high linearity, often with Third-order Intercept Points near +30 dBm and compression points around +20 dBm, requiring careful matching, biasing and thermal design.

Here are the core challenges engineers must solve:

Gain Flatness Across Frequency

Maintaining Gain flatness across frequency is a key challenge in wideband EW design. Amplifiers inherently exhibit Gain variation over frequency, which becomes more pronounced as bandwidth increases, leading to uneven signal response and potential distortion. Addressing this requires carefully engineered matching networks and equalization techniques to stabilize performance across the operating range. In EW systems, inconsistent Gain can degrade signal fidelity, resulting in missed detections or reduced jamming effectiveness.

Linearity Over Wide Bandwidth

Maintaining linearity over wide bandwidths is another critical challenge in EW system design. Wideband signals often contain multiple simultaneous tones and complex modulations, increasing the likelihood of nonlinear behavior in RF components. This nonlinearity generates intermodulation distortion (IMD) and spectral regrowth, which can degrade overall system performance. In practice, distortion can mask weak signals, reduce the effectiveness of jamming operations and even interfere with friendly systems operating within the same spectral environment.

Efficiency vs. Bandwidth Tradeoffs

Balancing efficiency and bandwidth is a fundamental tradeoff in EW system design. High efficiency is typically easier to achieve in narrowband architectures, where components can be optimized for a specific frequency range. In contrast, wideband systems often sacrifice efficiency to maintain performance across a broader spectrum. This reduced efficiency leads to increased heat generation, larger power supply requirements and degraded size, weight and power (SWaP) performance, factors that directly impact system integration and operational effectiveness.

Output Power Consistency

Maintaining consistent output power across a wide frequency range is a significant challenge in EW system design. As frequency increases, device performance often begins to degrade, making it difficult to sustain high power levels across the entire operating band. This variability can impact overall system effectiveness, particularly in jamming applications where consistent power delivery across the spectrum is essential to ensure reliable threat suppression.

Wideband RF design in electronic warfare systems requires balancing gain, linearity, efficiency and output power across a broad, dynamic spectrum that will ensure consistent, reliable performance in real-time, mission-critical environments.

How to Address Wideband EW Challenges

Wideband EW architectures address core RF design challenges through a combination of solid-state technologies, optimized circuit design and system-level integration. Solid-state power amplifiers and carefully engineered RF front ends enable more predictable gain behavior across wide frequency ranges, while optimized matching networks and equalization techniques help minimize variation and ensure uniform signal amplification, which reduces the risk of missed detections or degraded jamming effectiveness. The inherent predictability of these devices also supports improved linearity, and when paired with optimized biasing and system-level design, helps reduce intermodulation distortion and spectral regrowth to preserve signal integrity in dense, multi-signal environments.

At the same time, solid-state solutions help manage the tradeoffs between efficiency and bandwidth by delivering improved Power-Added Efficiency (PAE) and more consistent performance across temperature and load conditions, reducing excess heat and supporting more SWaP-efficient designs. These architectures also enable more consistent output power across wide frequency ranges, particularly when implemented in modular form factors that allow power scaling without redesigning the entire transmit chain. On the receive side, wideband low-noise amplifiers and front-end limiters protect sensitive components while maintaining stable noise figure and gain, preserving detection capability across the spectrum. Finally, integrated RF modules simplify system design, reduce assembly complexity and improve repeatability, while the inherent reliability of solid-state architectures ensures consistent performance under sustained, mission-critical operating conditions.

Conclusion

Wideband EW design is a constant balancing act—maintaining gain, linearity, efficiency and stability across a broad and dynamic spectrum, often under high power and real-time operational constraints.

By aligning device technology, integration strategy and system design with the realities of wideband operation, engineers can overcome the core challenges of modern EW, and deliver predictable, high-performance capability across the electromagnetic spectrum.

For more information about our RF solutions for wideband, high-power systems, visit our EW solutions page. Additionally, you can find more interesting collateral on this subject by visiting our Qorvo Design Hub for a rich assortment of videos, technical articles, white papers, tools and more. For technical support, please visit Qorvo.com or reach out to Technical Support.

From Laptops to the Cloud: Engineering a More Sustainable Digital World – Together

How Intel is advancing energy‑efficient computing across devices, systems and global data center infrastructure

As demand for AI and digital services accelerates, the responsibility to grow sustainably has never been greater. This Earth Day reminds us that in technology, efficiency matters as much as innovation—and sustainability must be built into every design choice we make.

Engineering Efficiency in Everyday Personal Computing

When we talk about improving Personal Computer (PC) energy efficiency, Intel approaches it as a three-layer challenge—starting at the platform and silicon architecture, extending through system level tuning, and reinforced by software level insight and optimization. This matters because meaningful energy savings don’t come from a single feature or setting; they come from aligning how hardware is designed, how systems behave in real world use, and how software interacts with the platform over time. Intel’s focus is on reducing energy use during everyday operation—the phase of a PC’s lifecycle where users and IT teams have the greatest opportunity to lower power consumption while still getting the performance and AI enabled experiences they expect.

At the platform level, the latest Intel® Core™ Ultra Series 3 processors are designed with energy efficiency as a foundational architectural goal. These platforms improve performance per watt by tightly integrating compute, graphics, memory, and dedicated engines for specific workloads, allowing common tasks—and select AI workloads—to run in more energy‑efficient states rather than relying solely on high‑power CPU cores. This architectural approach helps scale energy use to actual demand, reducing wasted power during idle and light‑use scenarios while preserving responsive performance when workloads intensify.

That foundation is strengthened at the system and software layers, where intelligent tuning and clear visibility enable smarter, more efficient operations. At the system level, Intel® Dynamic Tuning Technology uses advanced AI‑ and machine‑learning–based algorithms, combined with real‑time telemetry, to dynamically adjust power and thermal behavior based on workload demand—helping balance performance, acoustics, and energy use without manual intervention. At the software level, the Intel® Battery Life Diagnostic Tool provides visibility into how applications, background processes, and system configurations affect a PC’s ability to reach low‑power states, including identifying software behaviors that limit efficiency. Together, Intel® Core™ Ultra architecture, Intel® Dynamic Tuning Technology, and the Intel® Battery Life Diagnostic Tool demonstrate an end‑to‑end approach to energy efficiency: design for efficient execution in silicon, optimize behavior intelligently at the system level, and continuously improve through software insight—ensuring efficiency gains show up in real‑world use.

Efficient Compute at Data Center Scale

When you send an email, stream a video, or use AI-powered apps, you’re connected to data centers. Intel’s commitment to sustainability means those experiences are powered by technology designed to be energy-efficient and environmentally responsible. Energy efficiency is the ultimate competitive advantage in the AI era, and Intel is committed to leading the way toward sustainable, high-performance data centers for a sustainable future.

Our approach to power more energy-efficient and cost-effective data centers is structured around four key layers, spanning the entire product lifecycle from design to data center operations:

1. Design Layer: Energy Efficiency by Design
   Energy efficiency is integrated from the ground up during product design and development. Innovations include hardware optimizations, power benchmarks, regulatory compliance, and reducing embodied carbon. Intel® Xeon® 6 processors, for example, deliver up to 1.58x higher ¹ performance per watt compared to prior generations, helping reduce energy consumption and carbon footprint.
2. Monitoring Layer: Real-Time Power Telemetry
   Advanced CPU and platform telemetry systems monitor power usage in real-time. Tools like Intel® Application Energy Telemetry (Intel® AET) provide per-application, workload, and VM-level energy metrics, enabling data center operators to identify power consumption patterns and problem areas for better energy management.
3. Measurement Layer: Precise Power Analytics
   Technologies such as Running Average Power Limit (RAPL) and residency counters measure power consumption accurately. The Power and Performance Excursion Monitor (PEM) alerts operators to thermal and power limit events to prevent hardware damage. Intel® Platform Monitoring Technology (Intel® PMT) and Topology-aware Power Management Interface (TPMI) provide unified monitoring across server topologies.
4. Optimization Layer: Intelligent Power and Cooling Management
   Technologies like intelligent rack overprovisioning and Intel® Infrastructure Power Manager (Intel® IPM) optimize power usage dynamically. Power management features include Intel Optimized Power Mode (Intel OPM), Fast C1e states, Core C6 deep sleep states, and Enhanced Latency Control (ELC). Cooling innovations such as direct-to-chip cold plates and immersion liquid cooling capture up to 100% of heat for efficient thermal management. These solutions reduce operational costs, improve total cost of ownership (TCO), and support sustainability goals.

Our impact is reflected in how these solutions are being deployed around the world. Intel® Xeon® 6 processors can deliver up to an 80% reduction² in power consumption for AI image classification workloads compared to older generations, helping data centers do more with less energy. Server consolidation further lowers carbon footprint while reducing physical data center space. Through collaborations with Shell and Submer, Intel has helped enable the industry’s first certified immersion cooling solution for AI infrastructure. At the University of Waterloo, the Nibi supercomputer—powered by Intel Xeon 6 processors and liquid cooling—has become Canada’s first large‑scale immersion‑cooled supercomputer, supporting more than 4,000 researchers in a more sustainable way. And in hyperscale environments, Microsoft Azure uses Intel® Enhanced Latency Control to deploy more servers within existing data center footprints, improving performance per watt while reducing overall power consumption..

Advancing Technology, Protecting What Matters Most

By designing energy‑efficient platforms that scale with the world’s needs, we’re helping ensure digital innovation advances responsibly. It reflects our commitment to progress with purpose: delivering the performance people rely on, while caring for the planet and the resources we all share.

Growth should feel like progress.

But for a lot of MSPs, there comes a point where growth starts to feel heavier instead. New clients are coming in, and revenue is rising, yet the day-to-day operation feels more stretched, not more efficient. The service desk is constantly busy. Senior techs keep getting pulled into escalations. The team is working harder just to maintain the same standard of delivery.

The usual response is to hire more people. On paper, it makes sense. More demand requires more capacity. In practice, it’s where margins start to plateau because hiring doesn’t fix the underlying problem, it just helps you keep up.

The linear model that breaks margins

Most MSPs experience demand in a simple, linear way: More clients mean more tickets, and more tickets require more staff. It feels logical because it reflects what the team sees every day: More endpoints, user issues, performance complaints, and security-related noise.

But the model only works for so long, and isn’t scalable.

Headcount is one of the most expensive and least flexible ways to increase capacity. It comes with recruiting pressure, onboarding time, management overhead, and ongoing labor costs. It also increases dependency on specific individuals, which creates real risk when key technicians leave, burn out, or simply become the bottleneck.

It’s the daily MSP leader balancing act: Protect service quality and keep clients happy, without letting labor costs eat margins.

The real constraint isn’t demand

The hard truth is that most service desks aren’t under pressure because of major incidents every day. They are under pressure because of volume. Small, repetitive (and often preventable) issues that fill the day and steadily drain capacity like:

• Alerts that need validation
• Tickets that shouldn’t exist in the first place
• Investigations that go nowhere
• Routine tasks that feel unavoidable, but don’t move the business forward

This is operational noise, and it exists regardless of how many techs you hire.

When you hire more people, you increase your ability to process that noise, but you don’t reduce the amount of it. The same patterns keep creating the same work, and over time, you end up with a larger team handling the same problems at a higher cost.

Growth becomes less profitable because revenue rises, but the cost of delivering it rises right alongside it. Your margins don’t improve because the system underneath the business hasn’t changed.

The hidden cost is where your best people spend their time

As the linear model scales, your most capable people stop doing your most valuable work.

When senior staff are tied up in low-value investigations, constant escalation, and reactive firefighting, they are not improving the business. They’re being pulled away from the work they should be focused on, like standardizing service delivery, building repeatable processes, rolling out new security offerings, or creating operational improvements that increase margins over time.

The business keeps moving but it doesn’t move forward as it should, and it’s one of the clearest signs that the system is under strain. Your most experienced people are spending too much of their time protecting the present and not enough improving the future.

Reduce the work, scale well

The MSPs that scale most effectively don’t focus solely on adding capacity. Instead, they focus on reducing the effort required to deliver their services. That starts with prevention.

Every security event that reaches the helpdesk has already created work for the team. There is detection, alerting, triage, investigation, remediation, client communication, and the usual context switching that breaks a technician’s flow. Even if the event turns out to be harmless, the time has already been spent.

Across dozens or hundreds of clients, that creates a significant operational load. The earlier you stop the problem, you stop a significant amount of “noisy” work from ever appearing.

Prevention creates a quieter operation

If you can stop threats before a connection is made, a payload is downloaded, or an alert is generated, you remove the whole chain of downstream effort.

Fewer threats getting through means fewer alerts, fewer tickets, fewer investigations, and less need for senior escalation on routine security issues.

The impact is a quieter system that allows each technician to support more users and endpoints without constantly feeling stretched. It makes onboarding smoother because new clients don’t immediately feed unnecessary noise into the service desk. It gives the business a more predictable cost base and reduces the need to keep solving the same operational problems with more people.

Over time, it stabilizes your cost base. Instead of revenue and headcount rising together, you increase the number of clients each technician can support. Margin improves not because you charge more, but because it costs less to deliver the same service at the same (or higher) standard.

The advantage of provable value

When your security approach is preventative rather than reactive, the conversation with clients changes. You are no longer limited to showing how many tickets were closed or how quickly incidents were handled. You can show how much disruption and risk was avoided in the first place.

Value is easier to demonstrate because the outcome isn’t activity; it’s stability.

That creates a stronger foundation for pricing, packaging, and expanding security services.

Growth isn’t a bigger team, it’s a better system

Hiring more techs will always increase capacity in the short term.

But it will not, on its own, make your MSP more scalable. It will not reduce operational noise, simplify delivery, or lower the cost to support each client.

Only removing unnecessary work from the system does that. That is what separates growth from profitable growth. Not a bigger team, but a better operating model.

Learn how DNSFilter helps MSPs cut ticket volume, reduce technician workload, and improve margins at the DNS layer; start your free trial today.

For more than a decade, wireless microcontrollers (MCUs) have been evaluated primarily on radio performance. Range, sensitivity, protocol support, and transmit power defined leadership. These metrics still matter, but in modern IoT systems, connectivity is no longer the primary constraint. System complexity is.

Rethinking the Role of the IoT MCU

Today’s IoT products are expected to deliver more intelligence, tighter power efficiency, and faster time to market, all while reducing cost. Yet many designs still rely on multiple MCUs operating on the same board. A single device might have one MCU for connectivity, another for application control, and a third for real-time processing. And sometimes a fourth is required for sensing or device management.

This architecture persists because it’s familiar. But it’s far from optimal.

As IoT systems evolve, RF performance alone is no longer the defining metric. What matters today is how efficiently the entire system is architected.

Silicon Labs Series 2 was designed around the premise that wireless MCUs should not just connect devices, but consolidate them.

The Hidden Inefficiency in Today’s IoT Designs

A typical connected device often includes:

• A wireless SoC for Bluetooth Low Energy (LE), Zigbee, Thread, or proprietary connectivity
• An application MCU for control logic
• A motor-control MCU for deterministic actuation
• A low-power controller for sensing or housekeeping

Each additional device increases:

• Bill-of-material cost (BOM)
• PCB area
• Firmware complexity
• Validation effort
• Inter-processor latency
• Idle and leakage power

Ironically, much of this duplication is unnecessary. Wireless workloads are event-driven and burst-based. In many systems, the connectivity stack consumes a fraction of available CPU cycles. The processor becomes active during packet handling, then remains idle for extended intervals.

This creates a structural inefficiency. Significant compute headroom remains unused while additional MCUs are added elsewhere on the board. This presents an opportunity to reclaim that headroom and consolidate system functionality without compromising wireless performance.

Consolidation Only Works if Isolation is Guaranteed

The primary reason many systems remain partitioned is concern. Engineers hesitate to combine workloads for fear of degrading wireless determinism or introducing timing jitter into real-time tasks.

Silicon Labs Series 2 addresses this directly. It employs a multicore, event-driven architecture with functional separation:

• Dedicated cores manage radio and security operations
• Latency-critical wireless tasks execute independently
• The application core remains available for control, sensing, and AI workloads

This separation ensures that adding application functionality does not degrade wireless performance or real-time behavior. Instead of protecting RF integrity through partitioning, designers can now protect it through architecture.

Event-Driven Compute: Doing More with Less Power

Reducing component count is only part of the system equation. Power efficiency is equally critical. Traditional MCU-based systems rely heavily on CPU intervention. Interrupt-driven designs wake the processor frequently, increasing dynamic power consumption and adding software overhead.

Series 2 takes a fundamentally different approach.

Its Peripheral Reflex System enables peripherals to communicate directly with one another. Hardware events trigger hardware responses. Data can move through DMA pathways without waking the CPU.

For example:

• An ADC conversion can automatically initiate a memory transfer
• A comparator event can directly adjust a PWM output
• Timers can coordinate control loops autonomously

The processor wakes only when meaningful computation is required. This architecture delivers:

• Lower dynamic power consumption
• Deterministic real-time behavior
• Higher effective compute utilization

More work is done in hardware, so less energy is spent orchestrating it in software. In battery-powered and energy-sensitive systems, this is a structural advantage.

Real-Time Control and Connectivity on One Chip

Motor control illustrates the consolidation challenge clearly.

Closed-loop Field-Oriented Control (FoC) demands precise timing, high-speed ADC sampling, and coordinated PWM updates. Historically, this required a dedicated MCU to guarantee deterministic performance.

Series 2 challenges that assumption.

By combining advanced PWM peripherals, high-performance ADCs, hardware-based event routing, and efficient Arm Cortex-M33 processing, Series 2 can execute closed-loop FoC while simultaneously maintaining a Bluetooth LE stack on the same device.

This enables:

• Single-chip motor and wireless designs
• Reduced system latency
• Simplified firmware architecture
• Lower PCB complexity

For customers, the impact is direct:

• BOM reduction
• Lower power consumption
• Shorter validation cycles
• Faster time to market

The economics of intelligent devices shift when real-time control and connectivity coexist on one platform.

Embedded AI Without Additional Silicon

The next generation of IoT systems requires local intelligence. Sensor fusion, anomaly detection, predictive maintenance, and signal classification are increasingly moving from cloud to edge.

Traditional approaches add hardware. External NPUs or larger application processors increase cost, board space, and power complexity.

Series 2 integrates a Matrix Vector Processor (MVP) optimized for linear algebra, DSP workloads, and neural network inference.

By offloading math-intensive operations:

• CPU cycles remain available for control and connectivity
• Inference latency becomes predictable
• Energy per inference is significantly reduced

AI becomes a native system capability rather than an architectural add-on. Intelligence is integrated, not appended.

Platform Consistency That Scales

Architectural consistency is as important as performance.

Series 2 capabilities extend across Bluetooth, multiprotocol, sub-GHz, and proprietary families. Motor-control peripherals, AI acceleration, event routing, and security architecture are shared across the portfolio.

This enables:

• Software reuse across product variants
• Reduced SKU proliferation
• Simplified qualification processes
• Faster feature scaling

As organizations expand product lines or enter adjacent markets, a consistent platform reduces both technical and operational friction. Platform continuity becomes a multiplier for engineering productivity.

Connectivity is No Longer the Edge of the System, It’s at The Center

Many vendors approach connectivity by adding radios to traditional MCU architectures.

Series 2 takes the opposite path by absorbing application compute, control logic, and AI into the wireless platform itself. Instead of adding features through more silicon, the objective becomes removing silicon entirely.

In modern IoT systems, leadership will be measured by:

• How many components can be eliminated
• How efficiently compute headroom is utilized
• How intelligently power is managed
• How seamlessly functionality scales

A New Definition of the Wireless MCU

Series 2 redefines what a wireless MCU can be. A connectivity platform, an application processor, a real-time control engine, and an embedded AI accelerator. All within a single, power-efficient architecture optimized for real-world IoT systems.

As IoT architectures continue to consolidate, the question is no longer whether wireless MCUs should do more.

The real question becomes, how efficiently can they replace the rest of the system?

Series 2 was designed for this future from day one.

In modern IoT design, the most valuable innovation may not be what is added to the board, but what can finally be removed.

Change is coming to NETGEAR® Insight™, and it’s designed entirely around you.

IoT is now powering intelligent, autonomous systems, so developers need platforms that can handle real-time AI at the edge without sacrificing efficiency or scalability. That is exactly where the MediaTek Genio Pro comes in.

The MediaTek Genio Pro is a flagship platform designed for extremely high-performance, AI-driven embedded systems. Built on a cutting-edge 3nm process and equipped with an advanced AI processing unit capable of delivering over 50 TOPS of compute, it enables everything from real-time vision systems to on-device generative AI. With support for large language models, multi-camera inputs of up to 16, and rich multimedia capabilities such as 8K video, it is ready to support even the most demanding and varied applications.

Different industries will find unique value propositions in the MediaTek Genio Pro:

Robotics and Autonomous Systems Developers
Autonomous mobile robots or drones will benefit from Genio Pro’s sensor fusion, ROS2 support, and real-time AI inference, which allow them to sense, see, and make decisions instantly. It can process data from multiple cameras while running AI models locally, which is critical for navigation and decision making without cloud latency.

Industrial IoT Engineers
For factory automation, predictive maintenance, or machine vision, the platform’s certification for industrial temperatures ensures it fits demanding environments. High compute density combined with exceptional power efficiency lowers total cost of ownership by reducing lifetime power consumption, minimizing reliance on communication infrastructure, and lowering cloud server costs. Combined with Linux support including Yocto, Ubuntu, and Debian, it integrates smoothly into existing industrial stacks.

Smart Retail and Commercial IoT Builders
Developers working on smart kiosks, digital signage, or customer analytics systems can leverage multi-display support and edge AI to deliver personalized, real-time experiences throughout the store, all from a single device.

Edge AI and Generative AI Innovators
With on-device LLM capabilities that handle models up to 7B parameters, Genio Pro opens the door to private, low-latency generative AI applications, from intelligent or agentic assistants to advanced analytics at the edge.